
This is a verilog implementation of the instruction set architecture
of the 14-bit family "PIC" microcontrollers, similar to the 16F84 and
16C6X series of parts from MicroChip, Inc.

This implementation only includes the instruction set core.  No
peripherals are included except for a rudimentary I/O port.
Interrupts are not implemented.  It is intended to be in a style
suitable for both simulation and logic synthesis, but synthesis has
not been attempted yet.

This version has been adapted slightly so that it can be run with
recent snapshots of Icarus Verilog, <http://www.icarus.com/pub/verilog>.
When the preprocessor symbol ICARUS_VERILOG is defined, a few
constructions that Icarus can't yet deal with are omitted.

Steve Tell
tell@cs.unc.edu

