#!/usr/local/bin/perl
# simnodes - 
# script to output all nodenames found in a .sim file
# for use in looking for connectivity and heirarchy problems
# You'll almost always want to run the output through "sort -u"
#
#
# currently does mosfets, resistors, capacitor, and '=' only.
# parsing other builtin element types could be added easily.
#
# $Log: simnodes,v $
# Revision 1.1  1999/12/08 14:17:21  tell
# Moved in files from the old "hcutil" that weren't RCS'ed
#
# Revision 1.1  1995/08/10  19:07:37  tell
# Initial revision
#
#


line: while ($_ = <>) {
	chop($_);
	$_ =~ s/\|.*$//;	# wipe out comments
	next line if $_ =~ m/^\s*$/; # skip blank lines
	
	if( $_ =~ /^[np]/i) {
		($type, $gate, $src, $drain, $l, $w, $x, $y) = split(/[ \t\n]+/, $_);
		print $src . "\n";
		print $gate . "\n";
		print $drain . "\n";
 	} elsif( $_ =~ /^[rc]/i) {
		($type, $n1, $n2, $val) = split(/[ \t\n]+/, $_);
		print $n1 . "\n";
		print $n2 . "\n";
 	} elsif( $_ =~ /^=/) {
		($type, $n1, $n2) = split(/[ \t\n]+/, $_);
		print $n1 . "\n";
		print $n2 . "\n";
	} else {
		($dtype, $stuff) = split(/[ \t\n]+/, $_, 2);
		print STDERR "sim: don't know how to handle devices of type $dtype\n";
	}
}
